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Thursday, 15 June 2017

AMD launches EPYC processor

AMD has ushered in a new era for high-performance server processors and the data centre with EPYC processor, previously codenamed 'Naples'. With its high core count, superior memory bandwidth, and unparalleled support for high-speed input/output channels in a single chip*, EPYC aims to disrupt the dual-socket server market while simultaneously reshaping expectations for single-socket servers.

This new family of high-performance products for cloud-based and traditional on-premise data centres will deliver the Zen x86 processing engine scaling up to
32 physical cores**. The first EPYC-based servers will launch in June with widespread support
from original equipment manufacturers (OEMs) and channel partners.

“With the new EPYC processor, AMD takes the next step on our journey in high-performance computing,” said Forrest Norrod, Senior VP and GM, Enterprise, Embedded & Semi-Custom Products. “AMD EPYC processors will set a new standard for two-socket performance and scalability."

AMD has shown a single EPYC processor exceeding the performance of a competitive mid-range, two-socket/two-processor platform in a head-to-head comparison. EPYC exceeds today's top competitive offering on critical parameters, with 45% more cores*, 60% more input/output capacity (I/O)**, and 122% more memory bandwidth***.

“Dropbox is currently evaluating AMD EPYC CPUs in-house, and we are impressed with the
initial performance we see across workloads in single-socket configurations,” said Akhil Gupta,
VP, infrastructure at Dropbox. “The combination of core performance, memory bandwidth, and I/O support make EPYC a unique offering. We look forward to continuing to evaluate EPYC as an option for our infrastructure.”

EPYC features

• A 32-core system-on-a-chip (SoC) design, with support for two high-
performance threads per core
• Eight channels of memory per EPYC device***. In a dual-socket server, support for up to 32 DIMMS of DDR4 on 16 memory channels, delivering up to 4 terabytes of total memory capacity
• Complete SoC with fully integrated, high-speed I/O supporting 128 lanes of PCIe 3, negating the need for a separate chipset
• Optimised cache structure for high-performance, energy-efficient computing
• Infinity Fabric coherent interconnect for two EPYC CPUs in a dual-socket system
• Dedicated security hardware

“Today’s single-socket server offerings push buyers toward purchasing a more expensive
two-socket server just to get the memory bandwidth and I/O they need to support the compute
performance of the cores,” said Matthew Eastwood, Senior VP, IDC. “There are no fully-featured, high-performance server processors available today in a single-socket configuration. EPYC changes that dynamic by offering a single-processor solution that delivers the right-sized number of high-performance cores, memory, and I/O for today’s workloads.”
Interested?
Download a related white paper (PDF)

posted from Bloggeroid

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